Kindly leave feedback if you have queries/suggestions :-)Īll codes are in VHDL, I will try to add Verilog as well later on. I am presenting these circuits from my experience as an RTL designer so far. We are gonna play around a bit with clock in these designs. Let's see some of these circuits and scenarios where you may have to (or should have to !) use it in your design. These micro-circuits will come handy for every RTL designer on numerous scenarios like clock domain crossing, reset signalling, internal clock generation etc. In this blog, We will be seeing some circuits which I would like to call 'Tweak Circuits'. Hereafter, I will publish all my future technical blogs there :) I hope you guys follow/subscribe me for free content and knowledge and continue supporting me. This is to inform that this blog is now archived and I have started a new website/blog of my own: Chipmunk Logic.
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